xpm_cdc.sv,systemverilog,xpm,D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv,incdir="../../../../../../../modules/CmuClkRst/cores/ClkRstMMCM"
xpm_memory.sv,systemverilog,xpm,D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv,incdir="../../../../../../../modules/CmuClkRst/cores/ClkRstMMCM"
xpm_VCOMP.vhd,vhdl,xpm,D:/Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd,incdir="../../../../../../../modules/CmuClkRst/cores/ClkRstMMCM"
ClkRstMMCM_sim_netlist.v,verilog,xil_defaultlib,../../../../../../../modules/CmuClkRst/cores/ClkRstMMCM/ClkRstMMCM_sim_netlist.v,incdir="../../../../../../../modules/CmuClkRst/cores/ClkRstMMCM"
glbl.v,Verilog,xil_defaultlib,glbl.v
