xpm_cdc.sv,systemverilog,xpm,../../../../../../../../../../Xilinx/Vivado/2020.2/data/ip/xpm/xpm_cdc/hdl/xpm_cdc.sv,
xpm_memory.sv,systemverilog,xpm,../../../../../../../../../../Xilinx/Vivado/2020.2/data/ip/xpm/xpm_memory/hdl/xpm_memory.sv,
xpm_VCOMP.vhd,vhdl,xpm,../../../../../../../../../../Xilinx/Vivado/2020.2/data/ip/xpm/xpm_VCOMP.vhd,
GtyCore_sim_netlist.v,verilog,xil_defaultlib,../../../../../../../modules/GtyCore/cores/GtyCore/GtyCore_sim_netlist.v,
glbl.v,Verilog,xil_defaultlib,glbl.v
